Embodiments of this disclosure relate generally to electronic circuits, and more particularly, to a filtered low power, radiation hardened flip-flop circuit that mitigates sensitivity to single event upsets and single event transients (SETs).
Flip-flops may be used in logic pipelines in high performance digital Application Specific Integrated Circuits (ASIC), and mixed-signal Systems-on-Chip (SOC). As technologies scale, power density generally increases, making it necessary to develop new logic circuits that use less power. This trend is even more evident in ASICs and SOCs designed for space applications, where the spatial and temporal redundancy techniques used to mitigate Single Event Effects (SEE) caused by energetic particles may exacerbate power density concerns.
A single event in a flip-flop can flip the stored data, causing a Single Event Upset (SEU). Single events in logic gates create Single Event Transients (SETs) that can be captured by a flip-flop.
Spatial redundancy may be used to mitigate SEUs in flip-flops. Spatial redundancy is where two or more copies of the flip-flops may be used to reduce susceptibility to upsets in the flip flops. Transient filters may further be used to reduce or eliminate transients generated in the logic preceding the flip-flop and to keep the transients from being captured by the flip-flop. The addition of one or more redundant flip-flops and transient filters generally increases power and reduces performance significantly. The impact of redundancy depends on the flip-flop topology, while the impact of transient filters is similar for all flip-flop topologies.
A Dual Interlocked Storage Cell (DICE) flip flop with transient filters may be used to remove SETs at the flip-flop inputs DICE flip flops have improved. SEU tolerance by interlocking the storage nodes of two flip-flops. However, DICE flip flops generally use at least twice as much power as an unhardened flip-flop.
A Triple Modular Redundancy (TMR) flip flop also has improved SEU tolerance by triplicating the flip flop and using a majority voter to select the correct result. However, TMR flip flops generally use more than 3 times the power of the unhardened flip-flop.
Resistor-Capacitor (RC) filters may be used to mitigate SEUs in flip-flops. However, the resistors and capacitors generally require very large area in modern process technologies.
Therefore, it would be desirable to provide a system and method that overcomes the above identified problems, and others.